
Intel Socket LGA1700 at least has one more confirmed microarchitecture coming up, the 13th Gen Core "Raptor Lake."Īnd so the 5800X3D really targets those already on the AM4 platform. For all intents and purposes, the 5800X3D could be the swansong of Socket AM4 with its DDR4 memory and PCI-Express Gen 4.0, whereas Alder Lake looks to the future with its DDR5 memory and PCI-Express 5.0 I/O.



The Ryzen 7 5800X3D isn't AMD's first product to use this technology as the same 8-core CCDs with 3DV cache powers the EPYC "Milan X" server processors, where the company is claiming massive performance gains relevant to the HPC market, compelling enterprises to stick with AMD EPYC and existing SP3 infrastructure for DDR4 instead of switching to Xeon "Sapphire Rapids." I/O is where the Ryzen 5800X3D is a bit less exciting. Another possible reason for that is that the 3DV cache runs at the relatively low maximum voltage of 1.35 V, which is shared with the rest of the CPU die and thus limits the maximum boost clocks, which require higher voltage. AMD is so confident about the performance gain from 3D Vertical Cache that the 5800X3D runs at a lower clock speed than the Ryzen 7 5800X. This is akin to a generational IPC improvement, while AMD is still on Zen 3.
AMD RYZEN SOFTWARE
Both to the hardware (8 CPU cores on the CCD) and software, they are a seamless 96 MB 元 cache, which enables a drop-in compatible solution that doesn't even require OS or software updates.ĪMD claims that the large 3D Vertical Cache not only improves performance of multi-threaded workloads with large streaming data sets, such as video-encoding, file-compression, etc., but also has a huge direct impact on IPC, with single-threaded and gaming performance improvement claims in the range of 6 to 25 percent. This SRAM is interlinked with the CCD's main bi-directional ringbus and not some "add on" interface, such as Infinity Fabric, which means AMD has made it contiguous with the 32 MB on-die 元 cache, and both pieces of cache operate at the same clock speed-there's no performance compromise. A 64 MB SRAM die is stacked on top of the Zen 3 CCD. Anyway, back to the 3D Vertical Cache and Zen 3.ĪMD could not enlarge the 8-core Zen 3 CCD (CPU complex die) to make room for that added 元 cache, so it went vertical with die-on-die stacking. A loosely analogous engineering feat by AMD, the Infinity Cache memory on its RDNA 2 graphics processors with a "small" (16 to 128 MB) on-die cache operating at high speeds, could let AMD even narrow the GDDR6 memory bus widths generation-on-generation. This is accomplished by tripling the amount of 元 cache (last level cache). The company had to do something different, which it has by including 3D Vertical Cache.ĪMD claims that Zen 3, when paired with a highly lubricated memory pipeline, will enjoy a significant performance gain without having to dial up clock speeds (in effect, TDP).

The "Zen 3" CPU core has lost the IPC edge to Intel's new Golden Cove performance core (P-core) powering the 12th Gen Core Alder Lake lineup, so running a 5800X at insane clock speeds at the expense of efficiency and throwing out the 105 W TDP would have meant AMD repeating a long line of "Black Edition" SKUs, reflecting badly on the engineering prowess AMD built up over the past couple of years. The Ryzen 7 5800X3D is AMD doing to Intel what it did to AMD a couple of years ago-the 9th Gen Intel Core had lost multi-threaded performance leadership to AMD's "Zen 2" Ryzen 3000 series, so Intel created the Core i9-9900KS to stamp its dominance on the gaming performance space, banking heavily on the slight IPC edge its Skylake cores still had, and their ability to run at 5.00 GHz all-core. The AMD Ryzen 7 5800X3D processor is the talk of the town these days: AMD's 8-core "David" against the 16-core Intel Alder Lake "Goliath." The technology behind it, 3D Vertical Cache, was announced way back at Computex 2021, and it's finally here, almost a year later.
